atmega32M1 / atmega64M1 and the Arduino IDE

This series of blog entries will document the enhancements of the arduino IDE to support the ATmega32M1 and ATmega64m1 uC.   Make sure to follow this link to see all the changes and enhancements:
http://smartmppt.blogspot.com/search/label/xxM1-IDE



I selected the atmegaxxM1 uC for this solar MPPT controller for three reasons:

1. An very nice PSC (Power Stage Controller) module that can do tightly locked driving for the H-bridges - much more advanced then the standard PWM modules in say the atmega328p
2. Built in CAN controller
3. High degree of robustness as it was designed primary for automotive applications.
4. Being part of the atmega line of uC's, it is a close cousin to the atmega328p as used on the Arduino UNO

This last point is attractive as it could allow one to use the Arduino IDE to program the smartMPPT controller.  Only problem is - the atmega32/64M1 uC is not currently supported by Arduino.  Compounding this is that the serial port is a bit different - rather then a 'standard' UART it has a serial controller which can assist with UART functions, but also provide support for another type of bus used in automobile applications, the LIN bus.

All of this means  - one can not just plug things in and it will work.  Google turned up a few folks who looked into this, the one making perhaps the most progress was: http://spaces.atmel.com/gf/project/arduinoallegro/

Over the past few days I have been successful in porting the optiboot bootloader to the atmega32/64M1 uC, integrated the start of the environment from Stuart (specifically his work around Serial.print() functions.) and successfully have been able to use the Ardino IDE to flash in a bootloader, and then download sketches via the serial port!

Look under the resource tab above 'Arduino Libs', and select the  directory called 'atmegaxxM1 Arduino IDE'.  In there you will find an optiboot bootloader, modifications to the avrdude configuration file, as well as the Arduino IDE (boards.txt, etc..) and instructions on what to do with each.  I suspect there is a bit more work to do with the Arduino libs - beyond Serial.print(), and as I find and update those will post revised files to the resource tabs above.

I also have modes needed to support the atmega32M1, and once things are a bit more proofed out I will post a set of files needed to support that uC in the Arduino IDE.

==========================================================

Additional Info Feb 2015:  I have tracked down a bit more details re: the atmega64M1 uC support by the tools selected by Arduino for their IDE.   Bottom line:  In the 'main' release of Arduino uses gcc version 4.3.2, which does not have in its known list of uCs the atmega64m1 - but does have the atmega32m1.   My current 'work around' was to configure the above files for the atmega64m1 and 'spoof' to the compiler think it was a atmega32m1.  This works OK, but prevents me from defining both the 32M1 and 64M1 at the same time.

In the beta version of Arduino (1.5.8, etc) is an updated the GCC compiler (version 4.8.1?)  which has been updated to include many more uCs, including the atmega64M1.  For now I will continue to work with the  the 1.0.x releases, but in the future (and depending on what the Arduino team ends up doing) will perhaps switch to the 1.5.x versions for more complete support.

More additional info March 2015:  I have completed a porting over to the 1.6.0 release of the Arduino IDE - and was able to enable BOTH the ATmega32M1 & ATmega64M1 uC at the same time.   See here:
http://smartmppt.blogspot.com/2015/03/atmega32m1-and-atmega64m1-support-with.html

Status of prototype build.

We are now in the Portland OR area and could fetch mail (and boxes) from our mail drop.   Most all the components have arrived, and the PCB should be here soon.   But there is one delay:  the inductors from CoilCraft are on back-order until the end of January... 

Oh Well, will give me time to play with other parts of the bringup.

v0.0.1a of hardware design released

Today I edited this BLOG to put in the resource links above, and also posted the final release hardware design for the initial build v0.0.1a:

See 'Schematic' link above for larger image .pdf file

And here are some 3D renderings:

Top view

 

Bottom view

The module is approx 3x4" (actually, 80mm x 100mm), utilized 100v FETs and caps (I am suggesting keeping solar panel voltage below 85v), and can support up to 25A battery current.  These give it the following range of charging support per module:

• 12v battery:         345W capacity
• 24v battery:         690W
• 32/36v battery: 1,000W
• 48v battery:      1,380W

 To each the above capacities one or more solar panel can be used.  Example, for a 12v system one could use a single large 280W panel per controller.  For a 48v system, 4 such panels could be deployed in a combination of serial/parallel connection.

The costed BOM come to $73.30 + price of PCBs, which could be found for under $10 using overseas supplier.  I expect parts to arrive some time in December and will start assembling one unit then, and when I return to Viking Star will be able to start playing with trial runs on our solar panels as well as start developing the more advanced firmware.


For those interested there is a LTSPICE model of the buck converter using in this design under the CAD resource tab above - kind of fun to play with.

Final 'Rough-Cut' schematics #3

Tonight I posted what I am calling the last of the 'Rough Cut' schematics; last as I have completed my initial review of the switchers - and am well underway in PCB layout.  Next step will be to release v0.1 of the design, along with the CAD files.

Over the past weeks or so I have been focusing on the FETs and doing a bit of SPICE modeling, paying attention to the transitions.  As a result I swapped out the FET driver ICs for ones that are able to drive the FETs harder, removed any imposed gate resistance, and also removed the bypass diodes around the lower FETs.  This last step might seem odd, but in refining things I have been able to greatly shorten the dead-time, currently looking at using 35nS as a very safe starting point.  This short time seems contrary to some folks thinking for such large FETs, but actually is in line with start-of-the-art designs - Drive the FETs Fast-n-hard, and with the right drivers (ala the LT's I am now specifying) am able to get real tight switching w/o any adverse effects.

A higher resolution PDF file:

https://drive.google.com/file/d/0B5GiaoeXCQ3vclRRaFFEUXhQQXc/view?usp=sharing

 
Some other small changes include:

• Finalization of 5V and 13V power supplies. (though may need to change out 10Ohm R3, am just trying to reduce the number of different parts used)
• Addition of 'Service Port' which can be used instead of populating USB
• Upgrading all FETs to 100v parts, allows use of two common panels in series for 24v/48v batteries.
• Reduced some of the large switching  CAPs, still have plenty for the design.
• Changed Amp Shunt resisters from 1mOhm to 2mOhm for better use of ADC ranges

With these changes, the .xls sheet is indicating 98.6% - 98.7% conversion in the core.  SPICE modeling seems to confirm this, will see with actual hardware.


I have also been revising the layout of the core switching elements to minimize current paths.  I still have some work to do, and may end up modifying the schematic some, but largely I think this is close to what the finial design will be.

Note how some parts are still not places, I need to work on the drivers a bit more - but overall am happy with how this layout is shaping up.

We are about to begin our move from Minnesota back to Washington (and Viking Star) - with a stop in Portland for the Holidays.  It is likely I will not have too much time to put into this over the next few weeks, hence I wanted to get what I had posted.   But I do intend to finish this in time to order up some PCBs and parts so I can start playing with hardware after the new year, and when I am back at the boat with the solar panels!

Rought Draft #2 of schematic, and a draft PCB layout

I have posted into the Schematic link above a .pdf of the latest schematic.  Not a whole bunch has changed from the 1st rough-cut, Refining the FETs - settled on an asymmetrical pair:  Faster switching top FET, and lower Rdon lower FET.  Also have gone with DPAK devices for this 1st PCB FAB, may upgrade to the better PQFP ones later, but the DPAK ones will be simpler to replace if need be :-)    Replaced the LDO with a 2nd switcher in the power supply sub-system, saving that 125mW overhead.  And did a little SPICE modeling on the FETs and drivers and hence added a spot for some additional gate drive options (specifically the fast pull-down diodes on the High FETs) that might help with some of the cross-over losses.

Click for larger view <BR/> Also see the .pdf under the Schematics link above.

And here are a couple of views of the PCB layout Top and bottom:

Top view

The PCB comes in at 10x7cm, and a rough BOM cost of around $75-80, including an off-shore PCB fab.  I tried to select higher temperature 125c rated parts; that did increased BOM cost perhaps 10%.  If one wanted to back off and use an external USB <--> TTL adapter, and drop the CAN ports, might save $15-20???  Dropping one bank might save another $10??  (The PCBs come in around $2-3 using off-shore fab, so not sure it is worth doing more than one PCB design - just do stuffing options)

In the top 3D rendering above you can see some odd parts, notably the USB connector.  This is the result of stuffing options in the PCB design - I have in there the ability to use horizontal or vertical components for the USB, DIP switch, and the RJ-45 ports.  Or, one can populate headers and use external cables (e.g., to place this into a waterproof box and use waterproof external connectors vs. wiring glands).  Because all the stuffing options are in the schematic, they are rendered in the 3D view - each on top of the others.


Still to do:  I need to go through and confirm all the switching power supply calculations, inductors, caps, etc. (and there are three of them on the board!)  The caps used on the solar buck are rather costly (around $2-3 each), and want to make sure I have in what is both needed, but not more than what is.  I also need to finish the PCB layout, just a couple more routs to do, and confirm some thermal dissipation around the FETs - as I am relying on the PCBs as the heat-sinks.  Look for a physical interference between the caps and the large solar and battery connectors - the 3D rendering shows an overlap, but the connector 3D modes are mocked up and may not be accurate.  And I want to put some time into the xxM1 uCs and Arduino IDE - there are a few postings out there about using the uC with the Arduino IDE, want to make sure it will actually work before getting much further along.

There is a lot going on family wise these days, the above may take me a bit of time to complete.  My intention is once I complete some of the tasks above to order a set of 3x OSH-PARK PCBs and a set of components to build one up.  If someone is interested in building up one of the other PCBs, drop me a line.  At that time will also post up the CAD files to the links above.   I figure once things are proven a bit, will revise the PCB and get a set of them made - perhaps look into have some of the SMT parts machine assembled.  Might also revise the FETs to the 'better', but harder to hand assemble, QPFP packages.

Fine tuning the FETs

Have done some more modeling and think I am about at the end of incremental improvements using this tool.  I posted the .xls sheet with the additional drivers, FETs, and inductors I have been using in the reference tab above.

Below as the detailed results for three potential FETs.  All SMT, one the new PQFP package and two DPAK ones.  Costs are 1x qty from Mouser.com  Parameters use for each run was:

                Vpanel = 32.0v

                Vbat      = 13.8v

                22uF inductor

                100Khz PWM frequency

Early on I had to look to increase the operating frequency from 50Khz to 100Khz else the output capacity ESR losses became very large.  Unfortunately, increasing the frequency also increased switching losses in the FETs…  And at this point the switching losses for the high side FET are in the 350mW range.   Here are the detailed tables:

1)  IRFH7185 – PQFP - $3.92

IOUT (A)	HS Conduction Losses	LS Conduction Losses	HS Switching Losses	Diode Conduction Losses	Reverse Recovery Losses	MOSFET Output Capacitance Losses	High Side Gate Drive Losses	Low Side Gate Drive Losses	Inductor Winding Losses	Output Power (W)	Input Power (W)	Efficiency	HS Die Temperature (˚C)	LS Die Temperature (˚C)
.00	.0021	.0025	.0000	.0000	.3520	.1096	.0360	.0360	.0000	.00	.5382	0.00%	41.23	25.09
1.00	.0042	.0049	.0386	.0032	.3520	.1096	.0360	.0360	.0029	13.80	14.3873	95.92%	42.65	25.28
2.00	.0104	.0121	.0771	.0064	.3520	.1096	.0360	.0360	.0114	27.60	28.2511	97.70%	44.22	25.65
3.00	.0209	.0242	.1157	.0096	.3520	.1096	.0360	.0360	.0257	41.40	42.1297	98.27%	45.94	26.18
4.00	.0358	.0413	.1543	.0128	.3520	.1096	.0360	.0360	.0458	55.20	56.0235	98.53%	47.81	26.89
5.00	.0554	.0635	.1929	.0160	.3520	.1096	.0360	.0360	.0715	69.00	69.9328	98.67%	49.84	27.78
6.00	.0798	.0909	.2314	.0192	.3520	.1096	.0360	.0360	.1030	82.80	83.8579	98.74%	52.05	28.85
7.00	.1093	.1239	.2700	.0224	.3520	.1096	.0360	.0360	.1401	96.60	97.7993	98.77%	54.43	30.12
8.00	.1442	.1626	.3086	.0256	.3520	.1096	.0360	.0360	.1830	110.40	111.7576	98.79%	57.00	31.59
9.00	.1848	.2073	.3471	.0288	.3520	.1096	.0360	.0360	.2317	124.20	125.7333	98.78%	59.77	33.26
10.00	.2314	.2585	.3857	.0320	.3520	.1096	.0360	.0360	.2860	138.00	139.7272	98.76%	62.75	35.17
11.00	.2845	.3167	.4243	.0352	.3520	.1096	.0360	.0360	.3461	151.80	153.7403	98.74%	65.96	37.32
12.00	.3444	.3822	.4629	.0384	.3520	.1096	.0360	.0360	.4118	165.60	167.7733	98.70%	69.41	39.72
13.00	.4117	.4557	.5014	.0416	.3520	.1096	.0360	.0360	.4833	179.40	181.8273	98.67%	73.12	42.40

2)  IPD096N08N3 – DPAK - $1.78

IOUT (A)	HS Conduction Losses	LS Conduction Losses	HS Switching Losses	Diode Conduction Losses	Reverse Recovery Losses	MOSFET Output Capacitance Losses	High Side Gate Drive Losses	Low Side Gate Drive Losses	Inductor Winding Losses	Output Power (W)	Input Power (W)	Efficiency	HS Die Temperature (˚C)	LS Die Temperature (˚C)
.00	.0054	.0063	.0000	.0000	.2912	.0502	.0260	.0260	.0000	.00	.4051	0.00%	42.34	25.32
1.00	.0106	.0124	.0321	.0040	.2912	.0502	.0260	.0260	.0029	13.80	14.2553	96.81%	44.20	25.82
2.00	.0264	.0306	.0641	.0080	.2912	.0502	.0260	.0260	.0114	27.60	28.1339	98.10%	46.59	26.93
3.00	.0533	.0616	.0962	.0120	.2912	.0502	.0260	.0260	.0257	41.40	42.0423	98.47%	49.55	28.68
4.00	.0923	.1062	.1283	.0160	.2912	.0502	.0260	.0260	.0458	55.20	55.9820	98.60%	53.10	31.11
5.00	.1445	.1656	.1604	.0200	.2912	.0502	.0260	.0260	.0715	69.00	69.9553	98.63%	57.31	34.28
6.00	.2113	.2418	.1924	.0240	.2912	.0502	.0260	.0260	.1030	82.80	83.9658	98.61%	62.25	38.29
7.00	.2944	.3368	.2245	.0280	.2912	.0502	.0260	.0260	.1401	96.60	98.0173	98.55%	68.02	43.24
8.00	.3963	.4542	.2566	.0320	.2912	.0502	.0260	.0260	.1830	110.40	112.1155	98.47%	74.71	49.31
9.00	.5201	.5980	.2886	.0360	.2912	.0502	.0260	.0260	.2317	124.20	126.2678	98.36%	82.51	56.70
10.00	.6693	.7740	.3207	.0400	.2912	.0502	.0260	.0260	.2860	138.00	140.4834	98.23%	91.57	65.70
11.00	.8488	.9910	.3528	.0440	.2912	.0502	.0260	.0260	.3461	151.80	154.7760	98.08%	102.15	76.75
12.00	1.0658	1.2600	.3848	.0480	.2912	.0502	.0260	.0260	.4118	165.60	169.1639	97.89%	114.60	90.40
13.00	1.3280	1.5970	.4169	.0520	.2912	.0502	.0260	.0260	.4833	179.40	183.6706	97.67%	129.31	107.45

3) IPB090N06N3 – DPAK - $1.73,  60V max part

IOUT (A)	HS Conduction Losses	LS Conduction Losses	HS Switching Losses	Diode Conduction Losses	Reverse Recovery Losses	MOSFET Output Capacitance Losses	High Side Gate Drive Losses	Low Side Gate Drive Losses	Inductor Winding Losses	Output Power (W)	Input Power (W)	Efficiency	HS Die Temperature (˚C)	LS Die Temperature (˚C)
.00	.0037	.0046	.0000	.0000	.1280	.0655	.0360	.0360	.0000	.00	.2739	0.00%	32.89	25.19
1.00	.0072	.0091	.0302	.0040	.1280	.0655	.0360	.0360	.0029	13.80	14.1188	97.74%	34.24	25.52
2.00	.0178	.0223	.0603	.0080	.1280	.0655	.0360	.0360	.0114	27.60	27.9855	98.62%	35.87	26.21
3.00	.0358	.0446	.0905	.0120	.1280	.0655	.0360	.0360	.0257	41.40	41.8742	98.87%	37.79	27.26
4.00	.0614	.0763	.1207	.0160	.1280	.0655	.0360	.0360	.0458	55.20	55.7856	98.95%	40.03	28.69
5.00	.0950	.1176	.1509	.0200	.1280	.0655	.0360	.0360	.0715	69.00	69.7206	98.97%	42.58	30.51
6.00	.1371	.1693	.1810	.0240	.1280	.0655	.0360	.0360	.1030	82.80	83.6799	98.95%	45.47	32.73
7.00	.1882	.2319	.2112	.0280	.1280	.0655	.0360	.0360	.1401	96.60	97.6650	98.91%	48.72	35.40
8.00	.2490	.3065	.2414	.0320	.1280	.0655	.0360	.0360	.1830	110.40	111.6775	98.86%	52.36	38.54
9.00	.3203	.3939	.2715	.0360	.1280	.0655	.0360	.0360	.2317	124.20	125.7189	98.79%	56.41	42.19
10.00	.4029	.4955	.3017	.0400	.1280	.0655	.0360	.0360	.2860	138.00	139.7916	98.72%	60.93	46.42
11.00	.4979	.6129	.3319	.0440	.1280	.0655	.0360	.0360	.3461	151.80	153.8983	98.64%	65.93	51.27
12.00	.6066	.7482	.3621	.0480	.1280	.0655	.0360	.0360	.4118	165.60	168.0423	98.55%	71.49	56.85
13.00	.7307	.9036	.3922	.0520	.1280	.0655	.0360	.0360	.4833	179.40	182.2275	98.45%	77.66	63.23

System overhead:

         o    Output capacitor losses – est:   26mW (using 3.57A inductor ripple current)
         o    Input capacitor losses    - est:  162mW using 9A load.

·                O       +5v rail:  25mA -->   125mW

o   uC consumption:       14mA @5v (per datasheet typical)

o   OpAmps:                     100uA @ 5v (per datasheet typical)

o   CAN consumption:     6mA @ 5v (assuming a 1% dominate/recessive ratio)

o   Various pull-ups:         5mA @ 5v (WAG)

·    ·           O       uC power supply loss:  134mW

o   Switcher loss:                    9mW (Per datasheet, 25mA load, 36v Vin)

o   Linear Loss:                   125mW  (10v à 5v = 5v drop at 25mA)  -- Clearly need to look at this closer…

·    ·           O       Vbat & Vpan resistor network:  1.2mW

o   Vbat:                     190uW

o   Vpanel:                1mW

Total estimated overhead:  26mW + 162 + 125mW + 134mW + 1.2mW =   449mW  --> 450mW

Based on 250w input this would be a 0.18% reduction in the above efficiency numbers.  So, the IRFH7185 selection, instead of being 98.78% efficiency would come in at 98.60% overall.

If one did a depopulated (one bank only) configuration, and eliminated the CAN subsystem – that would save 60mW in losses between the CAN transceiver and uC power supplies.

The straw-man has a liner LDO regulator taking the 10v from the LTC3639 SPW down to 5v.  I had selected this as a cost trade-off in support of very low +5 current consumption if the uC is placed into sleep.  Most low cost small switching power supplies need a min of 5-10mA to remain stable, and in sleep the uC will be in the low uA range.  Perhaps need to consider another switching power supply, but a more costly one as the 125mW loss associated with the LDO is very significant.

How does this look, does it seem like I have missed something?

-al-