- Support for Vpp up to 80v
- Support for Ibat (output) up to 25a
- CAN (Stuffable optional)
- Dual bank, one can be depopulated to save for $ and cut current out in half.
I have been playing with efficiency modeling some more, and the current components represent the best mix I have come up with yet. While calculating the input capacity losses I had to bring the operating frequency from 50K to 100K in order to get the Iripple down to manageable level. At 50Khz I was getting over a 1W loss in the input caps. At 100K, and limiting configurations to realistic ones I can keep Iripple under 4A, and the input cap losses under 180mW. Here are the 4 configurations I expect folks to run at:
- 1x panel (Vp ~ 32v) --> 12v battery
- 1x panel (Vp ~ 32v) --> 24v battery
- 2x panel (Vp ~ 64v) --> 24v battery
- 2x panel (Vp ~ 64v) --> 48v battery
The worst case combination is actually #1, 1 panel and a 12v battery. With the core switching efficiency of 97.8% at max load. Adding in the cap losses of 75mW, and an estimated uC + CAN loss of 150mW = 225mW total additional loss. This will bring the total system efficiency down to an estimated 97.4%
For a .pdf copy of this, click here:
https://drive.google.com/file/d/0B5GiaoeXCQ3vM3ItbWZFV2thUjA/view?usp=sharing
A few notes:
- Need to scrub all components, recalculating again things.
- Current Best FETs are: Vashrey - SiS468DN. Low cost!, but also PQFN - SMT packaging...
- Need to verify idea of taking controller power from solar panels as opposed to battery and/or both..
- I used a LDO regulator to get g om10v to 5v as opposed to another switcher. Reason is during deep-sleep the uC power is in the uA range, and switchers are very inefficient there. Plus, the LDO will help make a quieter voltage source for the uC's A/Ds
- Want to look at adding simple l/c for the uC's A/D voltage source, to twy and quiet things down.
- There is still no input filtering on the solar panel side....
- Still want to look at FETs, worried about PQFN parts. . . .
Why are you so worried about PQFN? They are small indeed but with some experience and good flux they are not that bad to hand solder.
ReplyDeleteMarti, sorry for the late reply. Thanks - it is good to know someone has had experience doing them. Mostly I am concerned about rework, esp in the early phases of firmware development when one can expect a few 'Oh No' moments :-)
ReplyDeleteI have laid out the board to use traditional DPAK type devices, and once the firmware looks somewhat solid will look to redo the board. At that time relook at the PQFNs, or perhaps even move to some of the new GaN parts coming out!